$ account Xilinx
libsystemctlm-soc is a SystemC/TLM-2.0 based library for hardware verification and co-simulation, primarily targeting Xilinx/AMD platforms. It provides a comprehensive framework for modeling, verifying, and testing AMBA-based protocols (AXI, ACE, CHI) and PCIe interfaces through traffic generation, protocol checking, and hardware/software bridging capabilities. The architecture is modular with clear separation between communication layers (libremote-port), platform-specific implementations (soc), protocol bridges (tlm-bridges), utility components (tlm-modules), traffic generators, and verification infrastructure. Rather than a standalone application, it functions as a reusable library/framework that engineers integrate into their verification environments to create testbenches for SoC designs, enabling co-simulation between CPU models (via QEMU) and FPGA/ASIC models.
This repository is Xilinx's fork of QEMU, a full-system and user-mode emulator/virtualizer. It provides machine emulation via dynamic binary translation (TCG) and hardware acceleration through KVM, Xen, HVF, and other accelerators. The codebase includes a vast array of device models (CPUs, interrupt controllers, storage, network, graphics, timers, etc.), a block layer for storage backends, live migration for VM state transfer, and QMP/HMP monitoring interfaces. The architecture is highly modular with the QEMU Object Model (QOM), coroutine-based async I/O, and a plugin API. It also supports user-mode emulation for Linux and BSD syscalls. This is purely an application repo; there is no data science or research code. The Xilinx fork adds extensive device models for Xilinx FPGAs and SoCs (Versal, ZynqMP, etc.), making it especially relevant for embedded developers. The code is actively maintained with recent commits and issue triage, and while the sheer size introduces some technical debt, the overall engineering quality is high.