This repository implements a full-stack IEEE 802.11a/g/n Wi-Fi stack on a Xilinx Zynq SoC (ARM + FPGA) with an Analog Devices AD9361 RF front-end. The code replaces the standard Wi-Fi PHY and lower MAC with FPGA-accelerated processing, integrating with the Linux kernel's mac80211 framework for the upper MAC. It functions as a standard Wi-Fi Access Point, Client, or Ad-hoc node while providing deep programmatic access to the physical layer for research. The architecture centers on a monolithic kernel driver (driver/sdr.c) that orchestrates several modular sub-drivers (openofdm_tx/rx, tx_intf, rx_intf, xpu, side_ch), each controlling a specific FPGA IP core. User-space tools like sdrctl and side_ch_ctl provide CLI control over FPGA registers and enable high-fidelity data capture (IQ samples, Channel State Information) streamed over UDP to a host PC for analysis in Python or MATLAB. Beyond standard Wi-Fi operation, the platform is designed for wireless research, including packet injection/fuzzing (user_space/inject_80211), CSI-based sensing, radar, and performance measurement. The build system is managed through a well-structured Buildroot external tree (buildroot-external/), supporting a wide range of Xilinx-based SDR boards (AntSDR, PlutoSDR, ADI evaluation kits). The project is actively maintained with a strong focus on its niche hardware ecosystem. While the main kernel driver exhibits some monolithic tendencies, the sub-drivers, side-channel infrastructure, and build system patterns are well-crafted and reusable. The primary technical drift risk stems from its deep coupling to specific Xilinx and Analog Devices hardware and a custom Linux kernel fork.