thehardwarestore.ai

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── 99265 repos indexed ── | filtered by tag: #cpu
krrishnarraj/clpeak ★ 522 140 APPLICATION

clpeak is a cross-platform synthetic micro-benchmark that measures peak achievable compute performance (FLOPS/TOPS), bandwidth, latency, and AI inference throughput across CPUs, GPUs, and NPUs. It supports eight hardware backends: OpenCL, Vulkan, CUDA, ROCm/HIP, Metal, oneAPI/SYCL, native CPU (with per-ISA dispatch), and ONNX Runtime. The tool is architected as a set of backend-specific static libraries orchestrated by a common framework, with two front-ends: a CLI tool (`clpeak`) and a Flutter desktop/mobile GUI. The GUI communicates with the native library via a C-ABI FFI bridge, streaming structured events for live display. Results are serialized to a versioned JSON schema (v3) and can be compared against baselines. The codebase is notable for its meticulous anti-optimization engineering (MAD chains, compiler barriers, calibration probes) and its protobuf-free ONNX model generator. It is a mature, actively maintained project with extensive CI coverage and packaging for multiple platforms.

RATING: 9.3/10 MAINT: active DRIFT: medium
▸ 4 reusable components found
exelban/stats ★ 42305 1559 APPLICATION

Stats is a native macOS menu bar system monitor that provides real-time hardware and software metrics for CPU, GPU, RAM, Disk, Network, Battery, Sensors (temperature/voltage/fan), Bluetooth, and Clock. Built entirely in Swift with AppKit, it uses private IOKit, SMC, and IOReport APIs to collect system data, and offers highly customizable widgets (mini, line/bar/pie charts, tachometer, text, etc.) drawn directly in the menu bar. The architecture is modular: each monitored subsystem lives in its own 'Module' directory with a consistent structure (main.swift, readers, popup, settings, notifications, portal). A shared 'Kit' framework provides reusable components including a reader base class with interval management and history persistence via bundled LevelDB, a thread-safe key-value store wrapper, and a set of custom drawing chart widgets. The app also supports remote monitoring via an optional cloud service (System Stats), privileged helper for fan control, macOS widget extensions, and extensive localization (40+ languages). The codebase demonstrates strong engineering practices with clean abstractions, encapsulation, and reusability, though some modules exhibit boilerplate duplication and the project relies on several deprecated or private APIs that may require updates for future macOS releases.

RATING: 8.8/10 MAINT: active DRIFT: medium
▸ 3 reusable components found

The system-monitoring-center is a Linux desktop application for real-time system resource monitoring and management. It provides a tabbed interface displaying CPU, memory, disk, network, GPU, sensors, processes, services, users, and system information. The application allows users to monitor performance metrics, manage processes and services, and view detailed hardware information through a modular architecture. Built with Python and Tkinter using the Sun Valley theme, the application follows a modular structure where each tab (CPU, Memory, etc.) implements a consistent interface (tab_gui, initial_func, loop_func). Core system data is gathered by the Libsysmon module via /proc, /sys, and system commands (dmidecode, lspci, etc.). The GUI features interactive charts, process/service management capabilities, and supports internationalization across 15+ languages. Configuration is managed through a version-aware system in Config.py. Key reusable components include Common.py for generic GUI utilities (sortable treeviews, search entries, charting canvases) and Config.py for persistent settings management. The application demonstrates good engineering practices with clear separation of concerns, active maintenance, and low technical drift despite Linux-specific dependencies.

RATING: 8.2/10 MAINT: active DRIFT: low
▸ 2 reusable components found
unicorn-engine/unicorn ★ 9407 1554 APPLICATION

Unicorn Engine is a lightweight, multi-architecture CPU emulation framework derived from QEMU. It provides a pure C API with bindings for Python, Go, Java, Rust, Ruby, .NET, Haskell, Pascal, Zig, and VB6. The engine supports ARM, ARM64, M68K, MIPS, PowerPC, RISC-V, S390X, SPARC, TriCore, and x86 (16/32/64-bit). It is used primarily for security research, reverse engineering, fuzzing, and dynamic analysis of binary code. The architecture is a library with a central C API that exposes memory mapping, register access, hooks (code, block, memory, interrupt, instruction, syscall, TLB), and context save/restore. The core emulation logic is based on QEMU's TCG (Tiny Code Generator) for dynamic binary translation, with a custom glib compatibility layer to eliminate external dependencies. The repository includes extensive regression tests, fuzz targets, and sample programs for each architecture and binding. While the engine is actively maintained and widely used, it carries technical debt from its QEMU fork (based on QEMU 5.0.1) and auto-generated binding constants that may drift from the C API.

RATING: 8.0/10 MAINT: active DRIFT: medium
▸ 5 reusable components found
rafaelcalcada/rvx ★ 202 30 APPLICATION

RVX is a fully functional RISC-V RV32I microcontroller IP core written in synthesizable Verilog, targeting FPGAs (specifically Digilent Arty A7 and Cmod A7 boards). It implements the RV32I base ISA v2.1 plus the Zicsr extension and Machine-Level ISA v1.13. The core includes a custom system bus (`rvx_bus`) that can be parameterized with an arbitrary number of memory-mapped slaves, and a set of peripherals: UART, GPIO, SPI, and machine timer (`mtime`/`mtimecmp`). The repository provides complete example projects for bare-metal and FreeRTOS, including board-specific wrapper modules, constraint files, and TCL scripts for Vivado project creation. The software examples use CMake with the RISC-V GCC toolchain and the `libsteel` hardware abstraction library. A comprehensive verification suite covers all RV32I instructions via RISC-V Architecture Test programs, alongside Cocotb-based peripheral tests and a Verilator simulation framework with C++ harness. The bus interface uses a simple request/response handshake with write strobes, which is clean but non-standard (not AXI/Wishbone). The core is a single-monolithic file (~1300 lines) with a 4-state FSM and no pipelining, making it compact but harder to modify. Overall, the repository is a well-documented, professionally structured open-source hardware project with strong testing practices, suitable for FPGA-based embedded systems education or low-complexity control applications.

RATING: 8.0/10 MAINT: active DRIFT: low
▸ 3 reusable components found
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