$ show pyrpl-fpga/pyrpl
PyRPL is a Python library and GUI application that turns a Red Pitaya / STEMlab FPGA board into a multi-instrument real-time digital servo controller for quantum optics experiments. It provides hardware modules (PID, IIR filter, IQ modulator/demodulator, arbitrary signal generator, scope, trigger, PWM, etc.) and software modules (lockbox, network analyzer, spectrum analyzer, curve viewer). The system is used primarily for laser frequency stabilization (e.g., PDH locking) and phase-locked loops. Communication with the FPGA occurs over SSH and a custom low-latency TCP monitor server. A full Qt-based GUI allows live data display and module configuration. The repository also includes the complete FPGA firmware source (Verilog, Vivado TCL) for the Red Pitaya board, example Jupyter notebooks with experimental data, and CI pipelines for hardware-in-the-loop testing. While the core application is mature and actively used in research, the codebase carries legacy artifacts (old CI configs, Python 2 workarounds) and the FPGA design has unresolved timing violations.
The LLM identified 4 files worth highlighting for reuse:
A comprehensive descriptor system that unifies FPGA register access, YAML-based configuration persistence, and Qt widget creation into a single attribute pattern. Each property (FloatProperty, SelectProperty, BoolProperty, etc.) handles validation, normalization, FPGA read/write, config save/load, and automatic GUI generation. This is a self-contained, reusable pattern for any project requiring synchronized hardware register access and user configuration.
Implements continuous-to-discrete IIR filter conversion, partial fraction expansion, biquad coefficient generation, and fixed-point coefficient quantization without external scipy. It also simulates the filter with overflow detection. This module encapsulates non-trivial DSP theory and can be reused in any digital filter design tool.
A staged lockbox module that automates multi-step feedback locking sequences. It calibrates input signals by fitting to expected models (e.g., Fabry-Perot resonance), sweeps and optimizes PID gains, and executes lock/unlock sequences with status monitoring. The pattern of configurable stages with model-driven calibration is reusable for any experimental automation requiring iterative optimization.
Provides a MemoryTree/MemoryBranch nested dictionary structure backed by YAML files with automatic saving, dead-time coalescing, and atomic write with .bak fallback. It is used to persist module configurations. The pattern is a clean, reusable configuration manager for any application needing structured, persistent settings without a database.