This is a bare-metal (no_std) hardware abstraction layer (HAL) for Espressif ESP32 microcontrollers, supporting RISC-V and Xtensa cores. It provides low-level drivers for GPIO, SPI, I2C, UART, ADC, DAC, PWM, timer, USB, Ethernet, Wi-Fi, BLE, IEEE 802.15.4, and many other peripherals across a dozen+ chip families (ESP32, ESP32-C2/C3/C5/C6/C61, ESP32-H2/H4, ESP32-P4, ESP32-S2/S3/S31). The repository is a monorepo containing multiple independently versioned crates: esp-hal (core HAL), esp-radio (wireless radio stacks), esp-alloc (heap allocator), esp-storage (flash storage), esp-backtrace, esp-println, esp-sync (synchronization primitives), esp-rom-sys (ROM function bindings), esp-rtos (lightweight RTOS with async/embassy integration), esp-lp-hal (low-power core HAL), esp-config (build-time configuration), esp-metadata (chip property code generation), xtask (build/release tooling), and bootloader/OTA support. The architecture is built on extensive use of compile-time chip selection via macros (cfg_select!, for_each_*), versioned low-level driver modules per peripheral, and type-erased patterns for unified APIs across chip variants. Async support is first-class via embassy executor integration. The codebase demonstrates high engineering quality with clear abstractions, comprehensive hardware-in-the-loop testing (hil-test, hil-test-radio), and mature CI/CD workflows.